Given the above description, let's consider a SMP system that has some or all HT-enabled processors on NUMA architecture. The scheduler has to take into account certain limitations, while ensuring maximum CPU utilisation and fairness. A few of them are as follows:

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1. If a system is under CPU load imbalance, CPU load balancing must be done, i.e., a few processes must be moved from the busy CPU to the idle one.

2. If a process is cache hot, it should be run on the same CPU (to reuse the cache). If the CPU isHT-enabled, the second logical CPU should be considered to run the process.

3. The process should not be moved between UMA nodes (from one subset to another where memory access is slower) until really needed.