DRAM is the RAM itself. This is not different from current generation of memory. There will be companies making them, like Samsung and Winbond. They will be available in various memory capacities and speeds.

The memory controller will work similar way as present generation of memory controller works. It mainly what directs traffic of front side bus to and from memory. The game plan is to have all XDR devices use similar IO Cell and Memory controller. They may have to be changed, but you could theoretically upgrade the RAM. The biggest miss of RDRAM was a single channel only. DDR was able to run in dual channel and rapidly took over market. XDR RAM may have ability for dual channel.

Clocking

Most people do not worry about memory controllers and IO Cells, how much they have and how fast it is going. The new memory will utilize mesochronous interface, meaning it will move on a fixed, but random phase. The important thing is that it will be multiplied. If I said “4”, “PLL”, and “Multiplier”, I hope Pentium 4 will be in your mind. Intel calls this Quad-Pumped. Have you ever looked at what FSB is actually running at in BIOS, and seen 200, not 800 as Intel advertised? The 200 FSB is quadpumped; Intel, being the marketer they are, calls this an 800 MHz FSB. XDR will work in similar way as Intel’s quad pumped FSB.

Octal Data Rate

The full plan of memory is to give CPU and other elements with data quicker than hard drive. Many people confuse bandwidth with speed when talking about memory. Yes, quick memory means more bandwidth, but there are other factors that make a larger difference. XDR has Octal Data Rate; it will be able to move eight bits of data per clock cycle. DDR offers two bits per cycle and DDR2 offers four. If XDR is running at 400 MHz, it will be able to send 3.2 GHz data rates. With each generation of memory we double the bandwidth without rising speed at all.